A transistor includes a gate with a gate electrode layer over a gate dielectric layer. Current processes used in forming transistors have been found to produce gate oxides having non-uniform thicknesses. In particular, gate oxide thinning occurs at or near the edge of a shallow trench isolation (STI).
As device dimensions continue to become smaller, thinning of the gate oxide at the STI edge accentuates narrow-channel-effect. For example, changes in the gate threshold voltage (Vt) occurs. This negatively impacts performance and reliability, such as TDDB failures.
From the foregoing discussion, it is desirable to provide more uniform oxide layers to improve, for example, device performance and reliability.